What use is the INVD instruction?

Excellent question! One use-case for such a blunt-acting instruction as invd is in specialized or very-early-bootstrap code, such as when the presence or absence of RAM has not yet been verified. Since we might not know whether RAM is present, its size, or even if particular parts of it function properly, or we might not … Read more

SSE instructions: which CPUs can do atomic 16B memory operations?

In the Intel® 64 and IA-32 Architectures Developer’s Manual: Vol. 3A, which nowadays contains the specifications of the memory ordering white paper you mention, it is said in section 8.1.1 that: The Intel486 processor (and newer processors since) guarantees that the following basic memory operations will always be carried out atomically: Reading or writing a … Read more

Base pointer and stack pointer

When the function is called, the stack looks like: +————-+ | Parameter 2 | +————-+ | Parameter 1 | +————-+ | Return Addr | <– esp +————-+ then after the “stack frame” is set up: +————-+ | Parameter 2 | <– [ebp + 12] +————-+ | Parameter 1 | <– [ebp + 8] +————-+ | … Read more

Cycles/cost for L1 Cache hit vs. Register on x86?

Here’s a great article on the subject: http://arstechnica.com/gadgets/reviews/2002/07/caching.ars/1 To answer your question – yes, a cache hit has approximately the same cost as a register access. And of course a cache miss is quite costly 😉 PS: The specifics will vary, but this link has some good ballpark figures: Approximate cost to access various caches … Read more

Intel x86 0x2E/0x3E Prefix Branch Prediction actually used?

These instruction prefixes have no effect on modern processors (anything newer than Pentium 4). They just cost one byte of code space, and thus, not generating them is the right thing. For details, see Agner Fog’s optimization manuals, in particular 3. Microarchitecture: http://www.agner.org/optimize/ The “Intel® 64 and IA-32 Architectures Optimization Reference Manual” no longer mentions … Read more

Developing an operating system for the x86 architecture [closed]

For my final year project in collage I developed a small x86 OS with a virtual memory manager, a virtual file system and fully preemptive multitasking. I made it open source and the code is heavily commented, check out its source forge page at: https://github.com/stephenfewer/NoNameOS From my experience I can recommend the following: You will … Read more

What is the use of “push %ebp; movl %esp, %ebp” generated by GCC for x86?

unwind’s explanation is the literal truth (one minor directional error notwithstanding), but doesn’t explain why. %ebp is the “base pointer” for your stack frame. It’s the pointer used by the C runtime to access local variables and parameters on the stack. Here’s some typical function prologue code generated by GCC (g++ to be precise) First … Read more

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