R just stands for “register”. The AMD64 ISA extension added 8 additional general-purpose registers, named R8 through R15. The 64-bit extended versions of the original 8 registers had an R prefix added to them for symmetry. E stands for “extended” or “enhanced”. (Wikipedia says “extended”.) They are the “extended” versions of the 16-bit registers, in … Read more
(I’m the author of Process Hacker.) Firstly: A page fault is a trap to the software raised by the hardware when a program accesses a page that is mapped in the virtual address space, but not loaded in physical memory. That’s not entirely correct, as explained later in the same article (Minor page fault). There … Read more
In MSBuild 4.0+, there’s a $(MSBuildProgramFiles32) property for it, which you can confidently employ directly (especially if you’re prepared to put a ToolsVersion=”4.0″ at the top of the file to guarantee it’s going to be available and Fail Fast if it’s not). If you’re not and need something that can Do The Right Thing even … Read more
Recently I experienced a crash due to a 132 exit status code (128 + 4: program interrupted by a signal + illegal instruction signal). Here’s how I figured out what instruction was causing the crash. First, I enabled core dumps: $ ulimit -c unlimited Interestingly, the folder from where I was running the binary contained … Read more
The Shadow space (also sometimes called Spill space or Home space) is 32 bytes above the return address which the called function owns (and can use as scratch space), below stack args if any. The caller has to reserve space for their callee’s shadow space before running a call instruction. It is meant to be … Read more
No, Intel CPUs are little endian: http://en.wikipedia.org/wiki/Endianness
Bottom line (TL;DR): LFENCE alone indeed seems useless for memory ordering, however it does not make SFENCE a substitute for MFENCE. The “arithmetic” logic in the question is not applicable. Here is an excerpt from Intel’s Software Developers Manual, volume 3, section 8.2.2 (the edition 325384-052US of September 2014), the same that I used in … Read more
Because that’s all that’s needed. 48 bits give you an address space of 256 terabyte. That’s a lot. You’re not going to see a system which needs more than that any time soon. So CPU manufacturers took a shortcut. They use an instruction set which allows a full 64-bit address space, but current CPUs just … Read more
rbp is the frame pointer on x86_64. In your generated code, it gets a snapshot of the stack pointer (rsp) so that when adjustments are made to rsp (i.e. reserving space for local variables or pushing values on to the stack), local variables and function parameters are still accessible from a constant offset from rbp. … Read more
The performance difference comes from the efficiency of 128-bit divisions/modulus with GCC/Clang in this specific case. Indeed, on my system as well as on godbolt, sizeof(long long) = 8 and sizeof(__int128_t) = 16. Thus operation on the former are performed by native instruction while not the latter (since we focus on 64 bit platforms). Additions, … Read more