Powerpc has more powerful primitives available: “lwarx” and “stwcx” lwarx loads a value from memory but remembers the location. Any other thread or cpu that touches that location will cause the “stwcx”, a conditional store instruction, to fail. So the lwarx /stwcx combo allows you to implement atomic increment / decrement, compare and swap, and … Read more
You need to make the x attribute atomic, and not your whole class, as followed: class A { std::atomic<int> x; public: A() { x=0; } void Add() { x++; } void Sub() { x–; } }; The error you get in you original code is completely normal: there is no std::atomic<A>::Add method (see here) unless … Read more
There are three separate issues that “atomic” types in C++11 address: tearing: a read or write involves multiple bus cycles, and a thread switch occurs in the middle of the operation; this can produce incorrect values. cache coherence: a write from one thread updates its processor’s cache, but does not update global memory; a read … Read more
std::atomic is not copyable or movable because its copy constructor is deleted and no move constructor is defined. You have to explicitly load the other value and use it construct the new value, as it was pointed out in gustaf’s answer. Why is std::atomic not movable? As it is a synchronization primitive, all threads have … Read more
Use LRANGE with LTRIM in a pipeline. The pipeline will be run as one atomic transaction. Your worry above about WATCH, EXEC will not be applicable here because you are running the LRANGE and LTRIM as one transaction without the ability for any other transactions from any other clients to come between them. Try it … Read more
x86 does not require alignment for a lock cmpxchg instruction to be atomic. However, alignment is necessary for good performance. This should be no surprise, backward compatibility means that software written with a manual from 14 years ago will still run on today’s processors. Modern CPUs even have a performance counter specifically for split-lock detection … Read more
Why are you loading the old flags value twice in your CAS loops? The first time is by flags.load(), and the second by the compare_exchange_weak(), which the standard specifies on CAS failure will load the previous value into the first argument, which in this case is flagsNow. According to http://en.cppreference.com/w/cpp/atomic/atomic/compare_exchange, “Otherwise, loads the actual value … Read more
You cannot read the value of a std::atomic_flag without setting it to true. This is by design. It is not a boolean variable (we have std::atomic<bool> for that), but a minimal flag that is guaranteed lock free on all architectures that support C++11. On some platforms the only atomic instructions are exchange instructions. On such … Read more
It seems like part what you’re really asking is: Why isn’t the lock prefix implicit for cmpxchg with a memory operand, like it is for xchg (since 386)? The simple answer (that others have given) is simply that Intel designed it this way. But this leads to the question: Why did Intel do that? Is … Read more
For Java 1.7+, use java.nio.file.Files.move(Path source, Path target, CopyOption… options) with CopyOptions “REPLACE_EXISTING” and “ATOMIC_MOVE”. See API documentation for more information. For example: Files.move(src, dst, StandardCopyOption.ATOMIC_MOVE);