The answer to your question is – it depends. That’s strictly a CPU design decision, which balances over the tradeoff between performance and complexity. Take for example recent Intel Core processors – they’re physically tagged and virtually indexed (at least according to http://www.realworldtech.com/sandy-bridge/7/). This means that the caches can only complete lookups in pure physical … Read more
Because 32 bits are able to represent numbers up to 232 − 1 = 4294967295 = 4 GiB − 1 and therefore address up to 232 individual bytes which would be 4 GiB then. There are ways to circumvent that, though. For example using PAE even a 32-bit operating system can support more memory. Historically … Read more
blindly applying the LargeAddressAware flag to your 32bit executable deploys a ticking time bomb! by setting this flag you are testifying to the OS: yes, my application (and all DLLs being loaded during runtime) can cope with memory addresses up to 4 GB. so don’t restrict the VAS for the process to 2 GB but … Read more
Before I answer your questions (I hope I do), here are a few introductory remarks: Remarks The problem here is that “virtual memory” has two senses. “Virtual memory” as a technical term used by low-level programmers has (almost) nothing to do with “virtual memory” as explained to consumers. In the technical sense, “virtual memory” is … Read more
Kernel and user space work with virtual addresses (also called linear addresses) that are mapped to physical addresses by the memory management hardware. This mapping is defined by page tables, set up by the operating system. DMA devices use bus addresses. On an i386 PC, bus addresses are the same as physical addresses, but other … Read more
2 GB by default. If the application is large address space aware (linked with /LARGEADDRESSAWARE), it gets 4 GB (not 3 GB, see http://msdn.microsoft.com/en-us/library/aa366778.aspx) They’re still limited to 2 GB since many application depends on the top bit of pointers to be zero.