No, EIP / IP cannot be accessed directly, but in position-dependent code it’s a link-time constant so you can use a nearby (or distant) symbol as an immediate. mov eax, nearby_label ; in position-dependent code nearby_label: To get EIP or IP in position-independent 32-bit code: call _here _here: pop eax ; eax now holds the … Read more
(In the diagrams and text below, PC is the address of the branch instruction itself. PC+4 is the end of the branch instruction itself, and the start of the branch delay slot. Except in the absolute jump diagram.) 1. Branch Address Calculation In MIPS branch instruction has only 16 bits offset to determine next instruction. … Read more
MASM (Microsoft Assembler) is the popular assembler for Windows. MASM is for 16-bit and 32-bit applications(x86). ML64 is the one for 64 bit sources (AMD64/x86-64) NASM (Netwide Assembler) is the popular assembler for Linux but is available on Windows too. NASM supports 16-bit, 32 bit and 64 bit programs. FASM (Flat Assembler) is available for … Read more
Unless your 64-bit value can be encoded as a 32-bit-sign-extended immediate, you have to move it to a register first and then store. (Or do two separate 32-bit stores, or other worse workaround to get the bytes where you want them.) In NASM / Intel syntax, mov r64, 0x… picks a MOV encoding based on … Read more
Mnemonic cltq is the gas mnemonic for Intel’s cdqe as documented at: https://sourceware.org/binutils/docs/as/i386_002dMnemonics.html The mnemonics are: Convert Long To Quad (cltq): AT&T-style Convert Double to Quad Extend (cdqe): Intel Terminology: quad (aka quad-word) == 8 bytes long (AT&T) == double-word (Intel) == 4 bytes This is one of the few instructions whose GAS name is … Read more
OPCODE: It is a number interpreted by your machine(virtual or silicon) that represents the operation to perform BYTECODE: Same as machine code, except, its mostly used by a software based interpreter(like Java or CLR) MNEMONIC: English word MNEMONIC means “A device such as a pattern of letters, ideas, or associations that assists in remembering something.”. … Read more
Fewest uops (front-end bandwidth): 1 uop, latency 3c (Intel) or 1c (Zen). Also smallest code-size, 5 bytes. popcnt %rax, %rax # 5 bytes, 1 uop for one port # if using a different dst, note the output dependency on Intel before ICL On most CPUs that have it at all, it’s 3c latency, 1c throughput … Read more
There is e.g. Writing A Useful Program With NASM and of course the obvious http://www.nasm.us/doc/nasmdoc3.html. There are a couple of sample programs at http://www.csee.umbc.edu/help/nasm/sample.shtml If you are looking for a more general introduction to assembly programming there is The Art of Assembly Programming and the wikipedia page on NASM references Assembly Language Step by Step … Read more
It’s almost always returning from a function, like ret in some other ISAs like AArch64. bx stands for branch and exchange instruction set Which means that according to the lsb (least significant bit) of the address to branch to, the processor will treat the next instruction as ARM or as thumb. As lr usually holds … Read more
Assembly code normally does mean the human readable form of a machine’s native language (the so-called machine language). Byte code on the other hand is normally a language that can be interpreted by a byte code interpreter — so it is not the processor’s native language. Why the confusion then? You can’t compare Assembly language … Read more