When a system uses virtual memory, the kernel uses virtual memory as well. Windows will use the upper 2GB (or 1GB if you’ve specified the /3GB switch in the Windows bootloader) for its own use. This includes kernel code, data (or at least the data that is paged in — that’s right, Windows can page … Read more
Main differences: ARM is a RISC style architecture – instructions have a regular size (32-bit for standard ARM and 16-bits for Thumb mode, though Thumb has some instructions that chew up 2 instruction ‘slots’) up through at least ARM v5 architecture (I’m not sure what v6 does), the interrupt model on ARM is vastly different … Read more
It’s about locking the memory bus for that address. The Intel 64 and IA-32 Architectures Software Developer’s Manual – Volume 3A: System Programming Guide, Part 1 tells us: 7.1.4 Effects of a LOCK Operation on Internal Processor Caches. For the Intel486 and Pentium processors, the LOCK# signal is always asserted on the bus during a … Read more
Instruction fetches can be done in chunks with the assumption that much of the time you are going to run through many instructions in a row. so instruction fetches can be more efficient, there is likely a handful or more clocks of overhead per transaction then the delay for the memory to have the data … Read more
The distinction is in what instructions are used to manipulate the data, not the data itself. Modern computers (since circa 1970) use a representation of integer data called two’s-complement in which addition and subtraction work exactly the same on both signed and unsigned numbers. The difference in representation is the interpretation given to the most … Read more
This is how the C library function abs() does it in assembly without branching: abs(x) = (x XOR y) – y where y = x >> 31 (assuming 32-bit input), and >> is arithmetic right shift operator. Explanation of the above formula: We want to generate 2’s complement of negative x only. y = 0xFFFFFFFF, … Read more
I believe that you want to load the address of your string into %rsi; your code attempts to load a quadword from that address rather than the address itself. You want: lea msg(%rip), %rsi if I’m not mistaken. I don’t have a linux box to test on, however.
Excellent question! One use-case for such a blunt-acting instruction as invd is in specialized or very-early-bootstrap code, such as when the presence or absence of RAM has not yet been verified. Since we might not know whether RAM is present, its size, or even if particular parts of it function properly, or we might not … Read more
I think it’s just R for “register”, since there are additional registers R8 – R15 on x86-64, and R is a common prefix on many CPU architectures where registers are numbered.
The instruction is loading a new EIP value from memory at ds:[40207A]. i.e. there’s a function pointer at address 40207A. (And it pushes a return address because this is a call not just a jmp.) The ds: means the instruction is referencing memory in the Data Segment – and can pretty much be ignored on … Read more