What’s the purpose of the rotate instructions (ROL, RCL on x86)?

Rotates are required for bit shifts across multiple words. When you SHL the lower word, the high-order bit spills out into the carry. To complete the operation, you need to shift the higher word(s) while bringing in the carry to the low-order bit. RCL is the instruction that accomplishes this. High word Low word CF … Read more

Why isn’t the instruction pointer a normal register usable with MOV or ADD?

You can’t access it directly because there’s no legitimate use case. Having any arbitrary instruction change eip would make branch prediction very difficult, and would probably open up a whole host of security issues. You can edit eip using jmp, call or ret. You just can’t directly read from or write to eip using normal … Read more

What are the best instruction sequences to generate vector constants on the fly?

All-zero: pxor xmm0,xmm0 (or xorps xmm0,xmm0, one instruction-byte shorter.) There isn’t much difference on modern CPUs, but on Nehalem (before xor-zero elimination), the xorps uop could only run on port 5. I think that’s why compilers favour pxor-zeroing even for registers that will be used with FP instructions. All-ones: pcmpeqw xmm0,xmm0. This is the usual … Read more

Homoiconic and “unrestricted” self modifying code + Is lisp really self modifying?

In the first version (+ 1 2 3) is raw code, whereas in the second version it is data. By assuming the truth of this statement it can be argued that Lisp isn’t even homiconic. The code has the same representation as data in the sense that they are both lists/trees/S-expressions. But the fact that … Read more

Why are conditionally executed instructions not present in later ARM instruction sets?

General claim is modern systems have better branch predictors and compilers are much more advanced so their cost on instruction encoding space is not justified. This is from ARMv8 Instruction Set Overview The A64 instruction set does not include the concept of predicated or conditional execution. Benchmarking shows that modern branch predictors work well enough … Read more

What does an asterisk * before an address mean in x86-64 AT&T assembly?

It’s AT&T assembly syntax: source comes before destination mnemonic suffixes indicate the size of the operands (q for quad, etc.) registers are prefixed with % and immediate values with $ effective addresses are in the form DISP(BASE, INDEX, SCALE) (DISP + BASE + INDEX * SCALE) Indirect jump/call operands indicated with * (as opposed to … Read more

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