Experiences with Test Driven Development (TDD) for logic (chip) design in Verilog or VHDL
I write code for FPGAs, not ASICS… but TDD is my still my preferred approach. I like to have a full suite of tests for all the functional code I write, and I try (not always successfully) to write testcode first. Staring at waveforms always happens at some point when you’re debugging, but it’s not … Read more